A plasma display panel (PDP) is a display device that excites phosphors formed on an inner wall of a cell with vacuum ultraviolet light generated by gas discharge in the cell to generate visible light and express lighting. The PDP is divided into an alternating current (AC) type and a direct current (DC) type according to a discharge mechanism. Currently, an AC three-electrode surface discharge PDP is mainly employed among AC PDPs. The AC three-electrode surface discharge PDP induces gas discharge and light emission of a cell by alternately applying a high voltage of a high frequency between scan and sustain electrodes in a sustain discharge period.
In a sustain discharge circuit of the three-electrode surface discharge PDP, a high voltage of about 200 V is alternately applied to electrodes X and Y of the panel. Since a capacitor exists between the electrodes X and Y, a large amount of consumption power is required to charge or discharge the capacitor.
As the size of the PDP increases, the power consumption of the PDP also increases. Therefore, it is very important to develop a method for saving the power consumption. The method for saving the power consumption is determined by the physical structure of a device and the optimization of a discharge gas. Two methods are required to save power consumption when the panel is driven. A first method is a method for saving power consumption of a circuit itself by preventing heat from being generated from an unnecessary circuit, and a second method is a method for minimizing the supply of displacement current that is unrelated to discharge of the panel. To this end, an energy recovery circuit is used to minimize energy consumption by recovering energy applied to a panel from a power supply and using the recovered energy as displacement current before a sustain discharge voltage is applied.
A conventional energy recovery circuit 10 was proposed by Larry F. Weber. As shown in FIG. 1, the conventional energy recovery circuit includes a capacitor CR for energy recovery, that recovers and stores energy; two control switches SW1 and SW2 that supply the recovered energy and recover the energy applied to a panel CP; two diodes D1 and D2 for preventing reverse current; and an auxiliary inductor LR that induces a stable voltage pulse waveform by preventing current from being increasing rapidly in a process of supplying or recovering energy.
In the energy recovery circuit 10 of FIG. 1, energy supplied to the panel CP from a power supply is recovered to the capacitor CR for energy recovery. Before a sustain discharge pulse is applied, the recovered energy is applied again as a displacement current component to the panel CP, thereby reducing the load of the power supply. In FIG. 1, CP designated as a capacitor denotes a panel. The panel CP is typically expressed as a capacitor. Both ends of the panel are connected to electrodes X and Y, respectively. The electrodes X and Y are simply expressed as nodes X and Y, respectively.
The operation of the conventional energy recovery circuit 10 will be described as divided into four periods T1 to T4. The first period T1 is a period for supplying displacement current to the panel. It is assumed that a voltage Vcr charged into the capacitor CR for energy recovery by continuous charge and discharge of energy is a half of a sustain discharge voltage Vsus, i.e., ½ Vsus. In order to supply the voltage Vcr to the capacitor of the panel CP, a first switch SW1 is turned on by a first switch control signal of a high level, and second, third and fourth switches SW2, SW3 and SW4 are turned off by second, third and fourth switch control signals of a low level, respectively. At this time, current flows sequentially into the panel CP through the first switch SW1, the first diode D1 and the auxiliary inductor LR. Accordingly, a sustain discharge pulse voltage formed at one terminal of the panel CP, i.e., the node Y, is increased by resonance of the auxiliary inductor LR and the capacitor of the panel CP. Theoretically, the sustain discharge pulse voltage rises up to the sustain discharge voltage Vsus. The first diode D1 prevents flow of reverse current as a blocking diode for blocking the resonance of the capacitor of the panel CP and the auxiliary inductor LR.
The second period T2 is a period for supplying discharge current. The second switch SW2 is turned on by a second switch control signal of a high level, and the first, third and fourth switches SW1, SW3 and SW4 are turned off by first, third and fourth switch control signals of a low level, respectively. At this time, the first switch SW1 may be turned on by the first switch control signal of a high level. In this state, the sustain discharge voltage Vsus is directly supplied to the panel CP through the second switch SW2 from a power supply (not shown). Accordingly, the sustain discharge pulse voltage at the node Y is maintained continuously as the sustain discharge voltage Vsus.
The third period T3 is an energy recovery period. The voltage at the node Y is decreased down to a ground voltage GND. In order to recover the energy applied to the capacitor of the panel CP to the capacitor CR for energy recovery, the third switch SW3 is turned on by a third switch control signal of a high level, and the first, second and fourth switches SW1, SW2 and SW4 are turned off by first, second and fourth switch control signals of a low level, respectively. At this time, current flows sequentially into the capacitor CR for energy recovery through the auxiliary inductor LR, the second diode D2 and the third switch SW3. Accordingly, the sustain discharge pulse voltage at the node Y is decreased down to the ground voltage GND by the resonance of the auxiliary inductor LR and the capacitor of the panel CP. The second diode D2 is a blocking diode for blocking the resonance of the capacitor of the panel CP and the auxiliary inductor LR.
The fourth period T4 is a period for maintaining the sustain discharge pulse voltage at the node Y as the ground voltage GND. The fourth switch SW4 is turned on by a fourth switch control signal of a high level, and the first, second and third switches SW1, SW2 and SW3 are turned off by first, second and third switch control signals of a low level, respectively. The sustain discharge pulse voltage at the node Y is maintained as the ground voltage GND. At this time, the third switch SW3 may be turned on by the third switch control signal of a high level. In this state, the sustain discharge voltage Vsus is applied to the electrode X of the panel.
As described above, in the conventional energy recovery circuit 10, energy supplied to the panel CP is recovered to the capacitor CR for energy recovery, and the recovered energy is supplied again to the panel CP, so that an amount of energy supplied from the power supply can be minimized. That is, current required for discharge of the panel is not applied from the power supply, but the energy recovered after discharge is supplied again to the panel, so that the amount of power supplied to the panel from the power supply can be reduced.
Theoretically, it is assumed that a voltage VR charged into the capacitor CR for energy recovery corresponds to ½ of the sustain discharge voltage Vsus, and the energy recovery circuit has no energy loss. In the conventional energy recovery circuit 10, the sustain discharge pulse voltage can be increased up to the sustain discharge voltage Vsus by the ideal LC resonance of the inductor LR and the capacitor of the panel CP, and energy required for increasing the sustain discharge pulse voltage can be supplied from the capacitor CR for energy recovery.
Actually, however, due to a resistance component that exists in the energy recovery circuit 10 and energy loss caused by a switching device, the voltage at the node Y cannot rise up to the sustain discharge voltage Vsus in the first period T1, and perfect soft switching, i.e., zero-voltage zero-current switching is impossible, as shown in FIG. 3. Furthermore, discharge is frequently generated in the first period T1 in which the voltage at the node Y rises, and discharge current required for discharge is insufficiently supplied from the energy recovery circuit 10. Therefore, as a voltage drop is seriously generated, hard switching is more seriously generated. In addition, switching and electro-magnetic interference (EMI) noises of the circuit are seriously generated. As a result, driving reliability of the energy recovery circuit is lowered.
In order to solve these problems, it is required to develop an energy recovery circuit capable of increasing driving reliability of the circuit and improving energy recovery efficiency by achieving stable soft switching.